1. Field of the Invention
The present invention relates to an address selection circuit for selecting addresses of a program ROM (read-only memory) contained in an LSI (large-scale integrated circuit) of a computer system, such as a microcomputer system.
2. Description of the Related Art
In microcomputer systems, address selection circuits are used to select addresses of a program ROM contained in an LSI and storing a control program and data for readout only. A prior art address selection circuit is arranged as shown in FIG. 1.
Included in an n-bit instruction word read from a program ROM 11 is an address selecting instruction 12 used to select addresses of the ROM consisting of a control bit part 12-1 and an m-bit (m&lt;n) operand part 12-2. Control bit part 12-1 contains control bit data, while operand part 12-2 contains address selection data. In operand part 12-2, address selecting data for ROM 11 is described in a length of m bits. Data entry gate 13 is controlled by the control bit data in control bit part 12-1. When data entry gate 13 is enabled, the address selecting data in operand part 12-2 is loaded into counter 14 through gate 13. The parallel output bits (address output) of m-bit address counter 14 are applied to program ROM 11 as its address data.
Such an address selection circuit as shown in FIG. 1, however, cannot select addresses with more than m bits. That is, the number of bits of address data which can be selected is governed by the limited number of bits in operand part 12-2, making it impossible to prepare a program for address data whose number of bits is larger than that of the operand part. If operand part 12-2 were expanded up to the desired number m' of bits, the number of bits in an output instruction of program ROM 11 would have to be increased by "m'-m" bits. The number of signal lines of a data bus and the number of bits in an instruction register would thus have to be increased correspondingly, and the occupied area of the program ROM in the LSI would be increased.
A Japanese laid-open patent publication No. 61-48174 discloses a data storage device in which stored contents of a program ROM are selected within a semiconductor memory so as to produce address selected data. The data storage device has a memory for address selecting data as well as a main memory. The data read out from the main memory is subjected to selection by the data read out from the selecting data memory.
According to the data storage device disclosed in the patent publication, however, an extra selecting data memory is required, and the selecting data in the selecting data memory must be increased in number for intricate data selections. This will disadvantageously increase the area of a semiconductor chip.